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Greg Pfister, The Perils of Parallel, Intel Xeon Phi Announement (&me), here. Check out the Intel links at the end of the post.
Number one is their choice as to the first product. The one initially out of the blocks is, not a lower-performance version, but rather the high end of the current generation: The one that costs more ($2649) and has high performance on double precision floating point. Intel says it’s doing so because that’s what its customers want. This makes it extremely clear that “customers” means the big accounts – national labs, large enterprises – buying lots of them, as opposed to, say, Prof. Joe with his NSF grant or Sub-Department Kacklefoo wanting to try it out. Clearly, somebody wants to see significant revenue right now out of this project after so many years. They have had a reasonably-sized pre-product version out there for a while, now, so it has seen some trial use. At national labs and (maybe?) large enterprises.
I fear we have closed in on an incrementally-improving era of computing, at least on the hardware and processing side, requiring inhuman levels of effort to push the ball forward another picometer. Just as well I’m not hanging my living on it any more.
Henry Blodget, Business Insider,EX-APPLE ENGINEER: ‘Almost Everything That Apple Does That Involves The Internet Is A Mess’, here. This whole Akio Morita is to Steve Jobs as Sony is to Apple is going to go for a while. Yarow has a post on the same topic, here.
John Gruber, Daring Fireball, Seriously, Apple is Doomed, here. Gruber could go toe to toe with Blodget on this.
Long-term, the verdict is out. Jobs has only been gone for a year. Apple has yet to do a Big New Thing without him. The retention of talent remains their biggest risk, and Forstall’s departure highlights that. But in terms of innovation-without-Jobs so far, I’d say going from the original slow chunky iPad in April 2010 to the retina super-fast iPad 4 and svelte iPad Mini today is a pretty brisk clip. Two and a half years later Apple offers two very different iPads that both completely blow the original one away — and the original one is now almost universally hailed as a landmark innovation in the history of personal computing.
Cringely, While the Intel board was firing Paul Otellini they should have fired themselves, too, here. Apple is ditching Intel for it’s desktops so Otellini gets fired. The Haswell bet seems like less of a sure thing, now.
The company was too busy fighting AMD to notice the rise of mobile. And while the pundits are correctly saying ARM-this and ARM-that in their analysis of the Intel mobile debacle, the source of the successor technology is less important than the fact that the two largest high-end mobile manufacturers of all — Apple and Samsung — are making their own processors. They will never be Intel customers again.
Sean Gallagher, ars, Intel researchers put WiFi inside—the processor, that is, here. The futuristic view of supercomputers looking like smoking hairy golfballs just got a shave. Maybe just looking for smoking golf balls (hot 3D silicon) now.
At the Intel Developer Forum in San Francisco, Intel Chief Technology Officer Justin Rattner unveiled a pair of technologies coming out of Intel Labs that will overcome many of the size and power limits that have stood in the way of integrating radio technology more tightly with computers and other digital devices. The first, what Intel calls the “Moore’s Law Radio,” is a complete WiFi transceiver on a 32-nanometer scale silicon chip; the second, called Rosepoint, is a complete system-on-a-chip that integrates two Atom processor cores with a digital WiFi transceiver.
Lucas Mearian, ComputerWorld, Intel demos 7Gbps wireless docking, here.
Intel on Thursday demonstrated multi-gigabit wireless docking technology that affords speeds of up to 7Gbps, 10 times the rate of the fastest Wi-Fi networks based on the IEEE 802.11n standard.
At its annual Intel Developers Forum, the chip maker demonstrated Wireless Gigabit (WiGig) docking technology using an ultrabook. The company said WiGig is on track to becoming the most important next-generation multi-gigabit wireless technology.
Intel CTO Justin Rattner said there will come a day when an ultrabook or tablet can be dropped anywhere on a desk and automatically connect to a display monitor and peripherals.
Michael Feldman, HPCWire, Intel Weaves Strategy To Put Interconnect Fabrics On Chip, here. Boom goes the RDMA connection. All the Pluto Switch has to guarantee is that the packets get delivered in the same order as originally sent. The interleaving of the serial streams is important but probably not a huge deal.
Making the interconnect logic a first-class citizen on the processor, rather than just an I/O device would be a huge paradigm shift for the server market. If successfully executed at Intel, other chip vendors will be forced to follow suit. (AMD is likely already conjuring up something similar with the fabric technology it acquired from SeaMicro.) Meanwhile makers of discrete NICs and host adapter silicon will have to rethink their strategy, perhaps allying themselves with other chipmakers to offer competitive products.
Walking Randomly, Vectorizing code to take advantage of modern CPUs, here.
I’ve been playing with AVX vectorisation on Sandy Bridge CPUs off and on for a while now and thought that I’d write up a little of what I’ve discovered. The basic idea of vectorisation is that each core in a modern CPU can operate on multiple values (i.e. a vector) simultaneously per instruction cycle.
Sandy bridge (and the newer Ivy Bridge) processors have 256bit wide vector units which means that each CORE can perform certain operations on up to eight 32-bit floats or four 64-bit doubles per clock cycle. So, on a quad core you have 4 vector units (one per core) and could operate on up to 16 doubles or 32 floats per clock cycle.
This all sounds great so how does a programmer actually make use of this neat hardware trick? There are many routes:-
Intel, Intel SPMD Program Compiler, here. Wow.
ispc is a compiler for a variant of the C programming language, with extensions for “single program, multiple data” (SPMD) programming. Under the SPMD model, the programmer writes a program that generally appears to be a regular serial program, though the execution model is actually that a number of program instancesexecute in parallel on the hardware. (See the ispc documentation for more details and examples that illustrate this concept.)
ispc compiles a C-based SPMD programming language to run on the SIMD units of CPUs and the Intel Xeon Phi™ architecture; it frequently provides a 3x or more speedup on CPUs with 4-wide vector SSE units and 5x-6x on CPUs with 8-wide AVX vector units, without any of the difficulty of writing intrinsics code. Parallelization across multiple cores is also supported by ispc, making it possible to write programs that achieve performance improvement that scales by both number of cores and vector unit size.
There are a few key principles in the design of ispc:
- To build a small set of extensions to the C language that would deliver excellent performance to performance-oriented programmers who want to run SPMD programs on the CPU.
- To provide a thin abstraction layer between the programmer and the hardware—in particular, to have an execution and data model where the programmer can cleanly reason about the mapping of their source program to compiled assembly language and the underlying hardware.
- To make it possible to harness the computational power of SIMD vector units without the extremely low-programmer-productivity activity of directly writing intrinsics.
- To explore opportunities from close coupling between C/C++ application code and SPMD ispc code running on the same processor—to have lightweight function calls between the two languages and to share data directly via pointers without copying or reformatting.
ispc is an open source compiler with a BSD license. It uses the remarkable LLVM Compiler Infrastructure for back-end code generation and optimization and is hosted on github. It supports Windows, Mac, and Linux, with both x86 and x86-64 targets. It currently supports the SSE2, SSE4, AVX1, AVX2, and Xeon Phi “Knight’s Corner” instruction sets.
CPU World, website, here. Informative web interface allows you to drill down for tech specs, news and data on microprocessors, microcontrollers, and FPUs. Might be Treasure.
This page contains information about everything that’s at least remotely linked with microprocessors. Although we’ve made every effort to verify information posted here, we cannot guarantee that this information is correct and does not contain errors. Please use it at your own risk.
Wall Street & Technology, Nasdaq Data Center Launches Express Connect for Co-Location Clients, here.
Nasdaq announced the launch of Express Connect, a low latency, point-to-point network solution offering connectivity from the NASDAQ OMX Data Center in Carteret, N.J., to financial trading and co-location venues in New York, New Jersey, Chicago and Canada.
Nasdaq will initially team up on Express Connect with CFN Services, a provider of automated trading enablement services and Sidera Networks, a provider of fiber optic-based network solutions.
Intel Research, Blog, here. See for example, The video connection of the future: The Internet Protocols? here. Site feels a little stiff, but you never know. Maybe stiffness would go away if they posted some Gil Scott Heron videos on the site? Whitey on the Moon perhaps.
While folks over at Slashdot discuss the topic of “VGA and DVI Ports To Be Phased Out Over Next 5 Years” there is active research at the Intel Visual Computing Institute* (IVCI) and DFKI that might present a few other interesting video connectors alternatives. Instead of having various different video input and output methods the idea is to use something that already exists and could potentially do the same tasks: the good, old Internet Protocol.
Alphavillle, ‘The death of equities” … again? here.
Institutional investors, from pension funds to mutual funds sold directly to the public, have slashed holdings in the past decade. Stocks have not been so far out of favour for half a century. Many declare the “cult of the equity” dead.
ars technica, Stars aligning for June Ivy Bridge Mac launch alongside Mountain Lion (Updated), here. I tell ya, Lunchbox – this could be the one.
The one claiming to be the new MacBook Pro shows a 2.7GHz quad-core Intel Ivy Bridge Core i7-3820QM processor, and its motherboard appears to correspond with a new Mac configuration found within the first developer preview of OS X 10.8 Mountain Lion. “In addition, the Geekbench result has the test machine as running OS X Mountain Lion build 10A211, which would be newer than the 12A193i build seeded to developers on May 2,”
Colfax Research, Arithmetics on Intel’s Sandy Bridge and Westmere CPUs: not all FLOPs are created equal, here. Might be Treasure. Starts to quantify what AVX brings to the table in terms of optimized performance.
This paper presents a new arithmetic efficiency benchmark and uses it to compare the Intel Sandy Bridge E5-2680 CPU to the Intel Westmere X5690 CPU performance. The efficiency is measured for single and double precision floating point operations: addition, multiplication, division, square root and the exponential function, and for 32- and 64-bit integer operations: addition, multiplication and division. The SSE2 and AVX instruction sets, as well as scalar operations, in single-threaded and multi-threaded modes are covered. This benchmark eliminates the effects of memory bandwidth and latency by fitting the calculation in the L1 cache. The bandwidth of the L1 cache and main memory (RAM) are estimated for reference, and the LINPACK benchmark result is reported.
TEDx NewWallStreet, one message “Banking is ripe for Information Age innovation, disruption and improvement.” , here. Oh, ripe eh? TED talk videos on Finance.
Blodget, Business Insider, EXCLUSIVE: Here’s The Inside Story Of What Happened On The Facebook IPO, here.
In one of the biggest IPOs in history, in which a huge amount of stock was sold to small investors, privileged Wall Street insiders once again got top-notch information…and individuals got the shaft.
Zerohedge, An $8bn Loss Or Was JPMorgan ‘Unhedged, Long-And-Wrong’ Post-LTRO2? here.
So, in summary, it appears that the CDS data confirms what we suspected.
- A large (~$120bn) tail-risk tranche credit hedge was placed.
- The hedging of that hedge became very onerous but surprisingly profitable as markets rallied day after day with no give-back.
- This led to a greedy trader lifting some of the original tranche (and the HY short side) and leaving himself much more naked long to the market into LTRO2 – which marked the top. Losses escalated through April (~$2.5bn or so).
- Dimon went public (with some of the details).
- Last week, the rest of the tranche was dumped (we suspect) at a large cost (perhaps ~$5.5bn) leaving, we suspect…
- A potential ~$8bn loss and a heavy IG9 long credit position hedged (with major basis risk – difference in dynamics between the legs of the trade and the hedge) by various other liquid positions including shorts in HYG, JNK, IG18, and HY18 (and we would suspect equity/financials too).
Morgan Stanley’s research team came out with a note on Friday, guesstimating that JPMorgan’s losses on the synthetic credit portfolio held by its Chief Investment Office will come to $5bn by the end of the year, which is $2bn more than CEO Jamie Dimon seemed to think they’d come to when the announcement of the losses was first made on May 10.
I might have enjoyed this Andrew Ross Sorkin column, about how bringing back Glass-Steagall would have prevented neither the financial crisis nor l’affaire Whaledemort, more than most people.* Yes, the argument is pretty silly – like saying we shouldn’t have speed limits because they probably wouldn’t have prevented the Columbine massacre – but it contains an essential point that can’t be made often enough about the Volcker Rule:
But [bad sh]it often starts with banks making basic loans. Making loans “is one of the riskiest businesses banks engage in and has been a major contributing factor to most financial crises in the world over the last 50 years,” Richard Spillenkothen, former director of the division of banking supervision and regulation at the Federal Reserve, wrote in a letter to Politico’s Morning Money on Monday.
Bill Dally, EE Times, Q&A: Nvidia’s Dally on 3-D ICs, China, cloud computing, here. More complete interview reporting that HPC Wire recently summarized. EE Times may make you register for this but it is otherwise free. On China’s microprocessors:
Five years ago Godson was laughable. Now it’s competent but not state of the art. If they continue, I would expect them to be matching the West in three to five years and then pulling ahead. Quite frankly, this country is not investing as much in R&D in these strategic areas. It’s a question of government investment in research. In computing it’s slowed to a trickle.
If we want to have a pipeline of innovations that can fuel competitive products going forward, the government needs to invest in stuff beyond the horizon of what companies will reasonably invest in. The fundamental research lifts all the boats.
IB Times, ARM, Intel Battle Heats Up, here. Microprocessor server HPC is a side show, w Intel holding 94+% share.
Low-power processor maker ARM Holdings PLC (Nasdaq: ARMH) is stepping up the rhetoric against chip rival Intel Corp. (Nasdaq: INTC), saying it expects to take more of Intel‘s share in the notebook personal-computer market than Intel can take from it in the smartphone market.
I notice that Emanuel Derman is about to release his new book. The tome seems to deal with how the failings of finance theory can impact the world. This sounds very close to what my Lecturing Birds attempted to do. There are big differences though.
For one, Derman knows much more than I do about the subject matter.
He is also a better writer.
But I suspect that there is an area where I may have a slight comparative advantage. I am an amateur, a dilettante, a stranger in a strange land. Derman is a pro in the field. While he is way more open and honest than most other pros in this debate, he may not want to be more open and honest than necessary. In other words, he probably can´t or doesn´t want to be a denunciator. He can´t or doesn´t want to be too critical or too cynical. I, on the other hand, was able to be stringently accusatorial because I had no allegiance but to the evidence I unearthed and what such findings dictated me to conclude. Derman can highlight VaR´s weaknesses but he might not want to call for its banning. Derman can talk about BSM´s flaws, but he might not want to embrace Taleb-Haug. Derman can denounce the unrealism of models but he might not want to lead a campaign against the (possibly impractical, probably lethal) modelling of finance.
My Little Pony Physics, You Tube, here. Going viral via Tosh.0.
Weisenthal, Business Insider,Everyone Agrees: The ECB Is About To Make The Biggest Decision In Its History, here.
All the politicians in Greece (even the mainstream ones) have said they want to renegotiate the bailout agreement.
If the rest of Europe doesn’t back down and agree to this, then the ECB will have to make a huge decision.
Unless Greece chooses to leave the Euro area, which we doubt will happen, a Greek exit will require the rest of the region to push the country out. The mechanism for this will be the ECB excluding the Greek central bank from TARGET2, the regional payments and settlement system. Although this might look like a technical decision about monetary plumbing, the ECB will elevate this to the Euro area heads of state. It will be the most important political decision since EMU’s launch.
HPC Wire, Intel Rolls Out New Server CPUs, here.
Since the E5-4600 supports the Advanced Vector Extensions (AVX), courtesy of the Sandy Bridge microarchitecture, the new chip can do floating point operations at twice the clip of its pre-AVX predecessors. According to Intel, a four-socket server outfitted with E5-4650 CPUs can deliver 602 gigaflops on Linpack, which is nearly twice the flops that can be achieved with the top-of the-line E7 technology. That makes this chip a fairly obvious replacement for the E7 when the application domain is scientific computing.